The present invention relates to a phase detection circuit for use with, for example, a demodulator which is adapted for demodulation of PSK (Phase Shift Keying), QAM (Quadrature Amplitude Modulation) and other digital modulated carrier waves. More particularly, the present invention is concerned with a phase detection circuit for detecting a difference between an analog signal which contains a clock signal component and a reference clock signal.
A prior art phase detection circuit of the type described is made up of a reference clock generator, a timing extracting circuit, a set-reset flip-flop (SR FF), a counter, and a high-rate clock generator. The output of the reference clock generator is coupled to a reset input of the SR FF and a reset input of the counter. The timing extracting circuit extracts a timing signal from an analog signal which contains a clock signal. The timing signal is applied to a set terminal of the SR FF. The SR FF compares the phase of the timing signal with the phase of the reference clock signal which is fed to the reset input thereof, thereby producing a pulse signal which is representative of a phase difference between the two signals. Only when the output pulse signal from the SR FF is at a high level, does the counter count up clock pulses from the high-speed clock generator to produce the phase difference as a digital value.
The above-described type of phase detection circuit is not readily practicable, however, because the accuracy of the phase difference measurement cannot be enhanced unless the high-rate clock is a value which is sufficiently greater (usually more than thirty) than the modulation rate. Therefore, a demodulator and other circuits are operable at considerably high processing rates.